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22 часа назад

Analog Hardware Engineer (AI/Silicon)

200 000 - 400 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
UK/US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Analog Hardware Engineer (AI/Silicon): Building mixed-signal technology, analog circuits, library cells, and macros for an unconventional computing architecture with an accent on memory design, analog IP, and silicon performance. Focus on leading the end-to-end analog development flow, designing SRAM/DRAM/CIM circuits, automating design workflows, and bringing up taped-out chips.

Location: Hybrid in Silicon Valley (Mountain View), London, or New York City

Salary: $200K–$400K annually, plus equity

Company

hirify.global is an applied AI company building foundational hardware and software for the semiconductor industry, AI infrastructure, and advanced computing systems.

What you will do

  • Design custom analog and mixed-signal circuits, library cells, and macros for an unconventional computing architecture.
  • Lead the full analog development cycle from research and clean-sheet circuit design through parasitic extraction, tape-out, and silicon bring-up.
  • Develop or acquire analog IP for advanced silicon products and help direct analog EDA tool development.
  • Evaluate SRAM, DRAM, and compute-in-memory architectures, including core-level bitcell arrays and peripheral circuits.
  • Collaborate with silicon architecture, digital design, and layout teams to improve throughput per watt, performance, and reliability.
  • Measure, debug, and characterize chips in a silicon laboratory environment while automating design flows and data analysis.

Requirements

  • Experience developing analog IP from specification through GDSII in modern technologies, including tape-out and silicon bring-up.
  • Experience with SRAM or DRAM memory technologies, including bitcell arrays and peripheral circuits.
  • Experience designing and characterizing custom bitcells in schematic and layout.
  • Fluency with the Cadence flow, including Virtuoso, Spectre, Assembler, extraction, layout, HSMC, and characterization.
  • Deep understanding of noise and variation and their impact on silicon performance and reliability.
  • Experience with chip measurement, debug, characterization, and AI or scripting languages such as Python or Perl for workflow automation.

Nice to have

  • Experience leading, taping out, and bringing up compute-in-memory chips.

Culture & Benefits

  • Full-time employment with hybrid work across Silicon Valley, London, and New York City.
  • Opportunity to work across AI, semiconductor hardware, and unconventional computing.
  • Equity included in the compensation package.
  • Inclusive workplace with equal employment opportunity and reasonable accessibility accommodations.

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