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2 дня назад

Sr. Staff Validation Engineer (ASIC/SoC)

127 630 - 191 200$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Sr. Staff Validation Engineer (ASIC/SoC): Executing silicon bring-up and validation for advanced ASIC/SoC products integrating CXL 3.x, HBM, DDR, PCIe, and high-speed SerDes with an accent on hands-on lab testing, automation, and system-level debug. Focus on characterizing link and memory behavior, isolating silicon and hardware issues, and building repeatable validation infrastructure.

Location: Santa Clara, California, United States. The role may involve access to U.S. export-controlled technology; applicants must be eligible to access it, and some applicants may require export license review.

Base pay: $127,630–$191,200 per annum.

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, and carrier data infrastructure.

What you will do

  • Execute silicon bring-up and validation test plans for ASIC/SoC products using CXL 3.x, HBM, DDR, PCIe, and high-speed SerDes interfaces.
  • Set up and maintain lab environments with boards, power supplies, clocks, resets, and cabling.
  • Operate oscilloscopes, logic analyzers, PCIe/CXL protocol analyzers, pattern generators, BERTs, power supplies, and environmental chambers.
  • Develop scripts for lab automation, data collection, and analysis using Python, TCL, shell, MATLAB, or similar tools.
  • Characterize link and memory behavior, including throughput, latency, BER, margins, and power, and summarize results.
  • Debug issues across silicon, firmware, boards, and test setups while documenting procedures, results, and recommendations for cross-functional teams.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5–10 years of relevant experience, or a Master’s degree and/or PhD with 3–5 years of experience.
  • At least 3 years of experience in silicon or system validation, hardware testing, or related laboratory roles.
  • Working knowledge of PCIe, CXL, DDR, HBM, and SerDes concepts.
  • Hands-on experience with oscilloscopes, logic analyzers, protocol analyzers, power supplies, and similar lab instruments.
  • Experience with at least one laboratory scripting language, such as Python, TCL, or shell.
  • Applicants must be eligible to access applicable U.S. export-controlled technology; export license review may be required.

Nice to have

  • Experience validating high-speed digital interfaces and SerDes-based links.
  • Exposure to first-silicon bring-up or early hardware prototyping.
  • Familiarity with version control and engineering issue-tracking tools.

Culture & Benefits

  • Full-time employment with bonus and equity plan eligibility.
  • New-hire equity grant and annual equity refreshers.
  • Employee stock purchase plan with a two-year look-back.
  • Family support programs and mental and physical health resources.
  • Recognition and service awards.

Hiring process

  • Interviews evaluate individual experience, thought process, and communication skills.
  • AI tools, transcription applications, automated answer generators, and note-taking bots are not permitted during interviews.

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