Signal Integrity Engineer (SI/PI)

Location: San Jose, California, USA

Annual base salary: USD 143,800–230,000

Company

Develops advanced ASIC products and interconnect technologies for artificial intelligence and machine learning, cloud computing, wireless infrastructure, and networking.

What you will do

• Perform mask-based timing signoff using time-domain simulations for parallel interfaces, including 2.5D and 3D designs.
• Extract and model electromagnetic behavior in signal and power delivery channels across PCBs, packages, and interposers.
• Conduct AC and transient analysis of power distribution networks and analyze IO channels.
• Build pre-layout models for transceivers, signal networks, and power delivery networks.
• Automate sign-off processes and collaborate with EDA suppliers to improve tool accuracy and analysis flows.
• Prepare analysis results, presentations, sign-off reports, and pre-sales support for customers and internal teams.

Requirements

• 12+ years of related experience with a bachelor's degree, or 10+ years with a master's degree.
• Experience with at least one DDR, LPDDR, or HBM signal/power integrity sign-off tool suite.
• Experience with IC, package, and PCB database types.
• Experience with TCL and Python scripting for routine task automation.
• Ability to manage multiple concurrent customer engagements under short timelines.
• Ability to work independently across a worldwide organization and customer base and provide guidance with incomplete information.

Culture & Benefits

• Work across R&D, IP development, customers, and manufacturing partners.
• Eligible for a discretionary annual bonus and new-hire and annual equity awards.
• Medical, dental, and vision plans.
• 401(k) participation with company matching and an Employee Stock Purchase Program.
• Paid holidays, sick leave, vacation, family leave, and other applicable leaves.