6 дней назад
Principal Validation Lead (ASIC/SoC)
150 680 - 225 700$
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Описание вакансии
Текст:
TL;DR
Principal Validation Lead (ASIC/SoC): Owning lab validation strategy and silicon bring-up for advanced ASIC/SoC products integrating CXL, HBM, DDR, PCIe, and high-speed SerDes with an accent on test planning, high-speed measurement, and cross-functional debug. Focus on developing lab automation, characterizing links and memory interfaces, solving silicon and system-level root causes, and leading validation engineers through production readiness.
Location: Santa Clara, CA, United States; onsite lab work required
Expected base pay: $150,680–$225,700 per annum
Company
develops semiconductor solutions that support enterprise, cloud, AI, and carrier data infrastructure.
What you will do
- Define validation strategies and test plans for ASIC/SoC products using CXL, HBM, DDR, PCIe, and high-speed SerDes.
- Lead first-silicon bring-up, platform setup, and interface-level validation across boards, power, clocks, resets, and high-speed interfaces.
- Configure and operate oscilloscopes, probes, logic analyzers, protocol analyzers, BERTs, pattern generators, power supplies, electronic loads, and environmental chambers.
- Develop lab automation and data-analysis infrastructure using Python, TCL, shell, MATLAB, or similar tools.
- Analyze BER, eye diagrams, jitter, margins, throughput, latency, and power data to produce design and validation recommendations.
- Lead root-cause investigations, coordinate issue closure across design, DFT, firmware, and product/test engineering, and mentor validation engineers.
Requirements
- Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 10–15 years of related experience, or a Master’s degree and/or PhD with 5–10 years of experience.
- At least 5 years of industry experience in silicon or system validation with hands-on laboratory work.
- Strong expertise in at least two of CXL, PCIe, DDR, HBM, and high-speed SerDes.
- Experience leading bring-up and validation of complex ASIC/SoC products from first silicon through production.
- Hands-on experience with advanced lab equipment and high-speed measurement techniques.
- Strong scripting, lab automation, cross-functional debugging, and technical communication skills.
Nice to have
- Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience leading small validation teams or multi-site projects.
- Familiarity with DFT features such as scan, BIST, and JTAG.
- Experience with signal integrity, power integrity, SI/PI, or board design.
Culture & Benefits
- Bonus and equity plan eligibility, including a new-hire equity grant and annual equity refreshers.
- Employee stock purchase plan with a two-year lookback.
- Family support programs and mental and physical health resources.
- Recognition and service awards.
- Access to export-controlled technology may require eligibility under U.S. export control laws or an export license review.
Hiring process
- Interview process evaluates individual experience, technical reasoning, and communication.
- AI tools, transcription applications, automated note-taking bots, and real-time answer generators are not permitted during interviews.
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