Tech Lead Analog Mixed-Signal IC Layout Engineer

Location: Singapore, Singapore

Company

hirify.global provides rack-scale AI infrastructure through semiconductor-based connectivity solutions and a software suite for high-performance compute systems.

What you will do

• Design and verify hardware blocks for ASICs using leading-edge CMOS processes, methodologies, and tools.
• Contribute to analog and mixed-signal IC layout work within the ASIC team.
• Apply RTL design and verification techniques using Verilog and SystemVerilog.
• Develop and validate real-world systems for high-performance computing and networking applications.
• Work with verification methodologies including UVM, functional coverage, and assertions.

Requirements

• Pursuing a BS or MS in electrical engineering, computer science, or a related field.
• Hardware engineering background with an emphasis on VLSI or computer architecture.
• Hands-on knowledge of RTL design languages and tools, including Verilog and SystemVerilog.
• Familiarity with UVM, functional coverage, and assertions.
• Familiarity with Python or Perl and hands-on experience with C or C++.
• Exposure to digital design or verification, VLSI design, and circuits.

Nice to have

• Real-world design or verification experience in Verilog/SystemVerilog.
• Knowledge of high-speed interfaces such as PCIe, DDR, HBM, and SerDes.
• Familiarity with Synopsys EDA tools.

Culture & Benefits

• Work with technologies including CXL, Ethernet, NVLink, PCIe, and UALink for AI infrastructure.
• Join a team that values creativity, innovation, and diverse perspectives.
• Relevant applicants from diverse backgrounds, including veterans, parents, LGBTQ+ and non-binary people, and individuals with disabilities, are encouraged to apply.