Principal Mixed Analog Design Engineer (AI Connectivity)

Location: Irvine, California, United States

Salary: $170,000–$210,000 per year, depending on experience, level, and business need. The role may also be eligible for discretionary bonuses, incentives, and benefits.

Company

hirify.global provides rack-scale AI infrastructure through semiconductor-based connectivity solutions and a software suite integrating technologies such as CXL, Ethernet, NVLink, PCIe, and UALink.

What you will do

• Architect and design high-speed analog and mixed-signal circuits, including PLLs, LDOs, references, SerDes building blocks, ADCs, DACs, and clocking circuits.
• Drive designs from specifications and architecture through schematic development, layout supervision, and verification across PVT corners.
• Develop robust circuits in advanced FinFET process nodes while balancing power, area, and performance.
• Lead silicon bring-up, characterization, debugging, and root-cause analysis with validation and product engineering teams.
• Define test plans and correlate silicon performance with design targets.
• Set analog design methodologies and review standards while partnering with digital, physical design, systems, and architecture teams and mentoring engineers.

Requirements

• MS or PhD in Electrical Engineering or a related field.
• 8+ years of experience in analog and mixed-signal integrated circuit design.
• Experience designing high-speed analog circuits such as PLLs, SerDes front-ends, data converters, references, or regulators in advanced CMOS or FinFET nodes.
• Strong understanding of physical-layer design, signal integrity, and high-speed I/O.
• Proficiency with industry-standard design and simulation tools, including Cadence Virtuoso and Spectre, plus layout and parasitic-aware design skills.

Nice to have

• Experience taking multiple analog or mixed-signal designs through production tape-out and high-volume manufacturing.
• Expertise in high-speed serial links and PHY architectures, including PCIe, Ethernet, UALink, or UCIe.
• Familiarity with silicon debugging, ATE test development, and design-for-test techniques.
• Experience mentoring engineers and leading technical design reviews.

Culture & Benefits

• Hands-on work in a hyper-growth company focused on AI connectivity.
• Collaboration across digital, physical design, systems, architecture, validation, and product engineering teams.
• Discretionary bonus, incentives, and benefits may be available.
• Commitment to diverse ideas, backgrounds, and experiences.