Senior Analog IC Layout Engineer (Automotive)

Location: Guadalajara, Mexico

Company

hirify.global develops semiconductor products, with this role supporting automotive power solutions and industrial applications.

What you will do

• Lead physical implementation of analog and mixed-signal integrated circuits.
• Define and optimize floorplans for complex blocks and top-level assemblies.
• Drive layout execution from planning through tape-out while ensuring design quality and compliance with development methodologies.
• Own DRC, LVS, ERC, extraction analysis, post-layout verification, and physical sign-off activities.
• Coordinate with Design, Verification, Package, Test, and Product Engineering teams across international R&D sites.
• Mentor junior engineers and contribute to layout methodology and best-practice improvements.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Physics, Microelectronics, or a related field.
• Strong experience in analog IC layout development and expertise with Cadence Virtuoso Layout.
• Experience with DRC/LVS sign-off methodologies and a solid understanding of CMOS, BCD, SOI, and mixed-signal design environments.
• Ability to work independently and manage complex technical challenges.
• Strong communication, collaboration, and stakeholder management skills.
• Fluent written and spoken English required.

Nice to have

• Experience with Calibre, PVS, Quantus, StarRC, or equivalent EDA tools.
• Experience with automotive semiconductor products or high-voltage technologies.
• Experience with layout automation and scripting using SKILL, Python, TCL, or Shell.
• Previous mentoring or technical leadership experience.
• Interest in AI-assisted engineering and design productivity solutions.

Culture & Benefits

• Collaboration with Design, Verification, Package, Test, and Product Engineering organizations.
• Work within a global R&D network supporting multiple product lines.
• Focus on advanced automotive and industrial semiconductor development.