6 дней назад
Staff Engineer – Microelectronics Packaging Technology
101 361 - 178 255$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Staff Engineer – Microelectronics Packaging Technology (SiP/ANSYS/SOLIDWORKS): Designing and developing highly integrated System-In-Package and module subsystems for aerospace, defense, industrial, and medical applications with an accent on heterogeneous integration, 3D package design, and physics-based thermal and mechanical analysis. Focus on optimizing package architectures, solving chip-package and package-board reliability challenges, and developing manufacturable packaging technologies from early technology readiness levels through manufacturing readiness.
Location: Syracuse, NY, United States
Salary: $101,361–$178,255 annually, with a possible annual or quarterly company bonus.
Company
is a publicly traded US manufacturer of printed circuit boards, RF components, microelectronic assemblies, and mission systems.
What you will do
- Lead the design and development of advanced System-In-Package and module solutions using 2D/3D packaging, flip-chip interconnects, WLP bumped die, and embedded die.
- Create and optimize detailed 3D package designs in SOLIDWORKS in collaboration with RF, microwave, and electrical engineering teams.
- Perform ANSYS-based mechanical, vibration, thermal, and reliability simulations covering chip-package interaction, package-board interaction, warpage, and stress.
- Develop SiP design infrastructure, including package design flows, 3D modeling and simulation methods, and design rules.
- Evaluate materials, assembly processes, emerging packaging technologies, and manufacturing risks.
- Prepare technical proposals, white papers, conference publications, tradeoff analyses, and planning inputs for packaging projects.
Requirements
- Bachelor’s degree in mechanical engineering with materials coursework; a master’s degree is a plus.
- At least 9 years of relevant experience, including 6–7 years of hands-on semiconductor packaging development.
- Advanced 3D modeling skills with SOLIDWORKS and FEA-based mechanical and thermal analysis with ANSYS.
- Strong knowledge of semiconductor packaging, heterogeneous SiPs, substrates, silicon interconnects, metallurgy, underfills, epoxies, thermal interface materials, shielding, and assembly processes.
- Ability to solve ambiguous interdisciplinary engineering problems using physics-based models, statistics, design of experiments, and structured tradeoff analysis.
- Must have a background permitting the US Department of Defense to issue a Secret clearance when required; ITAR-related technical data access is restricted to US citizens and US permanent residents.
Nice to have
- Master’s education in a relevant engineering discipline.
- Exposure to basic vibration analysis concepts.
Culture & Benefits
- Work as an individual contributor within a multidisciplinary advanced technology team.
- Collaborate with manufacturing, operations, business units, material suppliers, and process vendors.
- Health, dental, and vision insurance options.
- 401(k), flexible spending and health savings accounts, life and disability insurance.
- Paid vacation and holidays; benefits generally begin on the first day of the month following hire.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →
Похожие вакансии
9 дней назад
Sr Principal Packaging Engineer (Semiconductor)
171 000 - 296 000$
8 дней назад
Packaging Process Development Engineer (Semiconductor Packaging)
99 030 - 188 890$
9 дней назад
Silicon Packaging Design Architect (Semiconductor Packaging)
164 470 - 311 890$
13 дней назад
Advanced Packaging Process Engineer (Semiconductor Packaging)
115 110 - 219 550$
9 дней назад
Sr. Mechanical Engineer (Power Tools)
13 дней назад
Sr Mechanical Design Engineer (Semiconductor)
90 500 - 118 755$