Silicon Packaging Design Architect (Semiconductor Packaging)

Location: On-site in Phoenix, Arizona, United States. US citizenship and the ability to obtain and maintain a US Government TS/SCI Security Clearance with Polygraph are required.

Annual salary range: $164,470–$311,890 USD.

Company

Intel's Silicon Packaging Architecture team develops advanced packaging solutions that support silicon technologies and 3D IC designs.

What you will do

• Translate product requirements into package architecture specifications.
• Make technology trade-off decisions across electrical, mechanical, thermal, reliability, and cost requirements.
• Collaborate with silicon, hardware, package, board, and EDA teams to deliver package solutions.
• Oversee package design, development procedures, quality standards, and continuous improvements.
• Troubleshoot materials, process, and packaging design issues with cost-effective solutions.
• Implement silicon-board co-design strategies and improve package design tools and methods.

Requirements

• US citizenship and eligibility for a US Government TS/SCI Security Clearance with Polygraph.
• Bachelor's degree in engineering, materials science, or a related STEM field with 6+ years of experience; or a master's degree with 4+ years; or a Ph.D. with 2+ years.
• 2+ years of hands-on experience in semiconductor fabrication, chip assembly, or packaging.
• Experience with electromagnetic simulation tools such as Mentor, Cadence, SPICE, Ansys, or similar platforms.
• Experience with Cadence Allegro or Mentor Xpedition platform tools.
• In-depth knowledge of assembly processes, test methodologies, and characterization techniques.

Nice to have

• Active US Government TS/SCI Security Clearance with Polygraph.
• 10+ years of experience in package, PCB, or IC digital design.
• Experience optimizing packaging designs for cost and quality.
• Experience with multidisciplinary collaboration and technology trade-off decisions.

Culture & Benefits

• On-site work model.
• Health, retirement, and vacation benefits.
• Competitive pay and stock bonuses.
• Work within an advanced semiconductor packaging environment.