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3 дня назад

Senior ASIC Design Engineer

156 400 - 253 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior ASIC Design Engineer (ASIC/Cybersecurity): Designing and delivering digital logic for next-generation firewall platforms with an accent on SystemVerilog RTL, high-speed interface IP, and silicon bring-up. Focus on closing performance, power, timing, and area targets, debugging across simulation and emulation, and piloting AI-driven design or verification flows.

Location: Santa Clara, California, United States; most teams work from the office full time.

Salary: $156,400–$253,000 per year, plus potential restricted stock units and bonus.

Company

A cybersecurity company developing next-generation firewall platforms and digital security technologies.

What you will do

  • Own ASIC module design from specification and micro-architecture through silicon bring-up.
  • Write SystemVerilog RTL that meets area, performance, and power targets.
  • Verify blocks through simulation, emulation, formal methods, and silicon bring-up.
  • Debug complex scenarios, close coverage, and add design-for-debug features with verification engineers.
  • Review synthesis and timing reports, optimize RTL, and support floor-planning for congestion and routability.
  • Pilot AI-driven design and verification flows to reduce schedule risk.

Requirements

  • Bachelor’s degree in electrical engineering, computer engineering, or computer science; a master’s degree or equivalent military experience is preferred.
  • 10+ years of front-end ASIC design ownership and experience shipping at least two chips to mass production.
  • Expert SystemVerilog RTL skills and experience defining micro-architecture from high-level requirements.
  • Experience selecting, integrating, and configuring complex IP for PCIe, Ethernet, or DDR interfaces.
  • Proficiency with scripting languages including Python, C/C++, Perl, bash, or tcsh.
  • Strong datapath design, timing/power/area analysis, silicon debugging, leadership, and communication skills.

Nice to have

  • Networking or cybersecurity domain knowledge.
  • Experience with search-algorithm accelerators.
  • Formal-verification ownership and hands-on silicon validation or lab bring-up.

Culture & Benefits

  • In-person collaboration focused on real-time problem-solving and precise execution.
  • Benefits may include restricted stock units, bonuses, and employee benefits.
  • Reasonable accommodations are available for qualified individuals with disabilities or special needs.
  • Immigration sponsorship is available for this role.

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