1 день назад
ASIC Verification Engineer
120 000 - 243 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
ASIC Verification Engineer (SystemVerilog/UVM): Building and verifying high-speed networking ASICs and SoC blocks from test planning through coverage closure with an accent on constrained-random testing, functional coverage, assertions, and waveform debugging. Focus on developing advanced UVM environments, validating packet-processing and networking silicon, and solving complex verification issues across cross-functional teams.
Location: Hybrid role based in Sunnyvale, California, with an expectation of working in the office 2 days per week
Salary: USD 120,000–243,000 annual base salary in California; variable incentives may also be offered.
Company
is a global technology company developing edge-to-cloud solutions and advanced networking routers, switches, and silicon.
What you will do
- Own block-level or subsystem verification from test-plan creation through comprehensive coverage closure.
- Develop, enhance, and maintain UVM environments, including agents, sequences, scoreboards, virtual sequences, and register models.
- Perform constraint-driven random testing, functional coverage, assertion checks, and complex SoC debug.
- Analyze simulation results and debug waveforms using Cadence Xcelium, Synopsys VCS, and Mentor Questa.
- Collaborate with cross-functional teams to resolve issues and deliver high-quality ASIC and SoC designs.
Requirements
- 5+ years of experience in ASIC or SoC verification.
- Strong expertise in SystemVerilog and UVM, including building verification environments from scratch.
- Deep understanding of randomization, constraints, functional coverage, and SVA assertions.
- Hands-on experience with test planning, coverage analysis, and debugging complex SoC designs.
- Proficiency with industry-standard simulation tools and waveform debugging.
Nice to have
- Experience verifying networking ASICs, router datapaths, packet-processing blocks, forwarding engines, or fabric interfaces.
- Familiarity with high-speed interconnects, buffers, scheduling pipelines, emulation, hardware acceleration, or traffic-model integration.
- Knowledge of coverage analytics, regression dashboards, Jenkins-based continuous integration, UPF, or formal verification.
- Experience with post-silicon bring-up and debug.
Culture & Benefits
- Inclusive workplace focused on collaboration, innovation, empowerment, and customer success.
- Health, financial, and emotional wellbeing benefits for employees and their families.
- Professional development programs supporting technical expertise and career growth.
- Accessibility accommodations are available during the application and interview process.
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