Design Engineering Intern (Verilog/RTL)

Location: Cork, Ireland

Company

hirify.global develops computational software, semiconductor design IP, and system verification hardware for electronic products ranging from chips to complete systems.

What you will do

• Implement RTL for Xtensa microprocessor cores, multiprocessor subsystems, and peripherals.
• Translate micro-architecture specifications into Verilog RTL.
• Simulate and debug processor functions and failures.
• Run synthesis, place-and-route, and other electronic design automation flows to meet timing, area, and power goals.
• Develop test plans, write functional diagnostics, and analyze coverage information.
• Collaborate with Design Verification and Electronic Design Automation teams.

Requirements

• Pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• Strong understanding of digital design fundamentals.
• Strong automation skills using Tcl, Perl, and shell scripting.
• Excellent oral and written communication skills.

Nice to have

• Exposure to electronic design automation tools.

Culture & Benefits

• Full-time internship within the Tensilica CPU Processor Team's R&D organization.
• Opportunity to contribute to processor cores used in audio, speech, AR/VR, ADAS, vision, imaging, and intelligent IoT applications.
• Work in a culture focused on innovation, collaboration, and customer success.
• Exposure to AI-augmented development practices and semiconductor design projects.