9 дней назад
CPU Clock Design Engineer (Semiconductor)
105 650 - 269 100$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
CPU Clock Design Engineer (Semiconductor): Designing and optimizing clock distribution networks, clock architectures, custom circuits, and timing solutions for high-performance CPU and SoC products with an accent on clock tree synthesis, static timing analysis, and power-performance-area tradeoffs. Focus on developing automation, closing timing across complex semiconductor designs, and driving clocking methodologies and technical issues to closure.
Location: Hybrid role based at sites in Austin, Texas or Hillsboro, Oregon, United States
Annual salary: $105,650–$269,100 USD
Company
develops semiconductor technologies and next-generation CPU products used in devices worldwide.
What you will do
- Design, implement, and optimize clock distribution networks for high-performance CPU and SoC products.
- Contribute to clock architecture development and clock tree synthesis methodologies.
- Perform timing analysis and support timing closure across complex semiconductor designs.
- Develop custom circuits, library cells, and clock-related design solutions.
- Analyze performance, power, area, and timing tradeoffs to improve product efficiency.
- Create automation solutions and collaborate with architecture, physical implementation, validation, and EDA teams.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 3+ years of experience, or a relevant master's degree with 1+ years of educational or work experience.
- Experience in at least three areas including digital circuit design, VLSI, physical design, clock tree synthesis, static timing analysis, logic design, custom circuit design, or semiconductor design methodologies.
- Experience with a programming or scripting language such as Python, Perl, TCL, Shell, or similar.
- Ability to collaborate across engineering disciplines, solve complex technical problems, and manage multiple priorities.
- Ability to work under the hybrid model at an assigned site in Austin, Texas or Hillsboro, Oregon.
Nice to have
- PhD in Electrical Engineering, Computer Engineering, or a related field.
- Hands-on experience with high-frequency custom clock network design on advanced technology nodes.
- Experience with clocking architecture, PLL/DLL architecture and design, timing constraint adaptation, timing closure, and full-chip design tools and flows.
Culture & Benefits
- Work on CPU and semiconductor technologies built with advanced process technologies.
- Access to mentorship, technical leadership opportunities, and continuous learning.
- Competitive compensation including stock bonuses.
- Health, retirement, and vacation benefits.
- Collaborative environment focused on innovation, technical excellence, and teamwork.
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