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7 часов назад

Principal SerDes Bring-up Validation Engineer

185 000 - 240 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Principal SerDes Bring-up Validation Engineer (High-Speed PHYs and Mixed-Signal Validation): Leading post-silicon bring-up, characterization, and validation of high-speed PHYs and retimers with an accent on automated test frameworks, physical-layer debugging, and silicon performance analysis. Focus on diagnosing cross-domain analog, digital, firmware, and protocol failures, tuning equalization and link behavior, and driving data-based design and release decisions.

Location: San Jose, California, United States

Salary: $185,000–$240,000 per year, depending on experience, level, and business need. Discretionary bonuses, incentives, and benefits may also apply.

Company

hirify.global provides semiconductor-based connectivity solutions and software for rack-scale AI infrastructure, integrating technologies such as CXL, Ethernet, NVLink, PCIe, and UALink.

What you will do

  • Lead end-to-end post-silicon bring-up, characterization, functional testing, parametric testing, interoperability checks, and performance benchmarking.
  • Translate product and design requirements into test objectives, pass/fail criteria, validation plans, and schedules.
  • Build scalable Python-based test automation, data-capture, analysis pipelines, and regression suites for mixed-signal test benches.
  • Debug analog, digital, firmware, protocol, package, and circuit interactions using laboratory measurements, waveform analysis, and system-level tests.
  • Develop test software and control interfaces for DSP and hardware platforms, including status monitoring and firmware interaction.
  • Collaborate with AMS design, firmware, system engineering, package, manufacturing, and other teams to deliver root-cause analyses, characterization reports, and design recommendations.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 8–12 years of hands-on experience in mixed-signal and high-speed laboratory environments.
  • Experience validating and bringing up high-speed PHYs or retimers against specifications.
  • Deep knowledge of NRZ, PAM4, PLLs, CTLE, DFE, FFE, transmitter equalization, jitter, CDR/PLL behavior, crosstalk, and power integrity.
  • Strong programming skills in Python and C/C++ for test automation, data analysis, and firmware interaction.
  • Hands-on experience with protocol analyzers, BERTs, real-time and sampling oscilloscopes, TDRs, VNAs, and related signal-integrity equipment.

Nice to have

  • MS or PhD in Electrical Engineering or a related field.
  • Experience designing and debugging laboratory characterization or demonstration boards.
  • Knowledge of IEEE 802.3 Ethernet standards, Ethernet PHY validation, link training, auto-negotiation, and compliance testing.
  • Experience with I2C, I3C, SPI, and UART interfaces.
  • Ability to translate SI/PI simulation results into laboratory validation plans.

Culture & Benefits

  • Work in a mixed-signal design environment focused on rack-scale AI infrastructure and high-speed connectivity.
  • Collaborate across design, firmware, systems, package, and manufacturing disciplines.
  • Potential eligibility for discretionary bonuses, incentives, and benefits.
  • hirify.global encourages applications from people with diverse backgrounds and experiences.

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