Digital IC Design Intern (ATPG)

Location: Yokneam, Israel

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, and carrier data infrastructure.

What you will do

• Assist with scan insertion and ATPG flow setup for digital designs.
• Generate and validate test patterns for stuck-at and transition faults.
• Analyze fault coverage and identify opportunities for improvement.
• Support silicon bring-up and debug test-related issues.
• Collaborate with design, verification, validation, software, IP, and vendor teams to resolve technical issues and meet testability requirements.
• Document methodologies, results, and best practices.

Requirements

• Be a second- or third-year B.Sc. or M.Sc. student in Electrical Engineering, Computer Engineering, or a related field.
• Basic understanding of digital logic design and VLSI concepts.
• Familiarity with scripting languages such as Python, Perl, or TCL.
• Strong analytical, problem-solving, communication, and teamwork skills.
• Eligibility to access export-controlled technology or software may be required; applicants may be subject to a U.S. export license review.

Nice to have

• Exposure to EDA tools such as Synopsys TetraMAX, Cadence Modus, or similar tools.

Culture & Benefits

• Full-time position with competitive compensation and benefits.
• Collaborative, transparent, and inclusive work environment.
• Access to tools and resources for professional growth and development.

Hiring process

• Interviews evaluate individual experience, thought process, and communication skills.
• AI tools, transcription apps, automated answer generators, and automated note-taking bots are not permitted during interviews.