Junior Digital Design Engineer (Semiconductors)

Location: Nijmegen, Netherlands

Company

hirify.global develops advanced RF and mixed-signal system-on-chip solutions for audio, radar, automotive, and industrial applications.

What you will do

• Support digital hardware design and implementation for integrated circuits and semiconductor products.
• Assist with RTL coding, simulation, synthesis, and basic timing analysis under the guidance of experienced engineers.
• Identify, debug, and resolve design issues throughout the development cycle.
• Collaborate with verification, architecture, and physical design teams on project execution.
• Prepare technical documentation, design specifications, and reports on design activities and results.
• Contribute to design quality and the improvement of engineering methodologies and best practices.

Requirements

• Bachelor’s or Master’s degree, or expected graduation, in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, Physics, or a related discipline.
• Academic or project experience in digital design, computer architecture, logic design, FPGA development, or related areas.
• Basic knowledge of hardware description languages such as Verilog, SystemVerilog, or VHDL.
• Strong analytical and problem-solving skills with a willingness to learn new technologies and methodologies.
• Ability to work effectively in a collaborative, cross-functional engineering environment.
• Good written and spoken English is required.

Nice to have

• Exposure to simulation, synthesis, FPGA, or other digital design tools through coursework, internships, research, or personal projects.

Culture & Benefits

• Work alongside experienced professionals, technical experts, architects, and innovation leaders.
• Gain hands-on exposure to advanced semiconductor technologies.
• Work in a multidisciplinary environment spanning architecture, design, verification, thermal engineering, and project management.
• Contribute to products serving automotive and industrial markets.