Senior Packaging Engineer (AI)

Location: Hybrid in Palo Alto, United States

Salary: $180,000–$270,000 per year plus equity, benefits, and 401(k)

Company

hirify.global is a startup building foundational technology to improve performance, scalability, and resiliency in large-scale AI data center clusters.

What you will do

• Architect and deliver advanced multi-die IC packages for high-performance AI accelerators.
• Select and design package types including MCM, 2.5D, 3D, fan-out, CoWoS, InFO, CPC, and CPO.
• Define package specifications, bump and ball maps, interposer requirements, mechanical constraints, and substrate stack-ups.
• Design high-speed signal escape, routing, and power distribution networks.
• Manage packaging subcontractors and work with TSMC and OSAT partners on bumping, substrate options, and advanced packaging flows.
• Partner with IC design, physical design, SI/PI, and board teams while supporting bring-up, failure analysis, debug, and qualification.

Requirements

• B.S. or M.S. in Electrical Engineering or a related field.
• Experience with multi-die package design and UCIe AP/SP integration.
• Understanding of substrate materials, stack-ups, and mechanical constraints.
• Familiarity with signal integrity and power integrity concepts.
• Experience managing packaging subcontractors and interfacing with TSMC or OSAT providers.

Nice to have

• Knowledge of package modeling tools such as HFSS, Sigrity, or similar.
• Experience evaluating emerging packaging technologies for next-generation products.

Culture & Benefits

• Work alongside experienced builders and operators in a collaborative, accountable environment.
• Support for professional growth and meaningful technical work.
• Equity, benefits, and 401(k) included.
• Company operations span remote and on-site locations in the United States and Canada.