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1 день назад

Advanced Package Design Senior Staff Engineer (Semiconductor Packaging)

141 150 - 211 400$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Advanced Package Design Senior Staff Engineer (Semiconductor Packaging): Developing advanced microelectronic packaging solutions for next-generation semiconductor products supporting 448 Gb/s data rates and beyond with an accent on package floorplanning, signal integrity, power integrity, and manufacturability. Focus on designing 2.5D/3D packages, performing electromagnetic and transmission-line analysis, automating SI/PI activities with Python, and coordinating cross-functional product development through production.

Location: Santa Clara, CA, United States

Expected base pay: $141,150–$211,400 per annum

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, and carrier data infrastructure.

What you will do

  • Develop advanced microelectronic packaging solutions for next-generation semiconductor products supporting 448 Gb/s data rates and beyond.
  • Lead package development and electrical design, including floorplanning, netlist creation, and BGA map definition.
  • Optimize signal integrity, power integrity, performance, manufacturability, reliability, and cost.
  • Evaluate package technologies and drive layout implementation with package operations teams.
  • Define package requirements and achievable specifications with marketing, system architecture, and IC design teams.
  • Advance packaging technologies from concept through product development and production.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 7+ years of relevant experience, or a Master’s degree and/or PhD with 5+ years of experience.
  • Experience with high-speed electronic packaging for digital and analog ICs, package floorplanning, netlists, schematics, and BGA maps.
  • Experience with 2.5D/3D package development and knowledge of packaging materials, substrate design rules, and assembly rules.
  • Strong fundamentals in electromagnetics, transmission lines, and microwave theory, with experience using 2D/3D EM simulation tools.
  • Experience with tools such as Ansys HFSS, SI-Wave, Cadence Clarity, PowerSI, or similar package and power-integrity tools.
  • Ability to collaborate across IC layout, analog and digital design, SI/PI, thermal-mechanical, assembly, and marketing teams; strong communication and documentation skills.

Nice to have

  • Experience with CPC/CPO connectors.
  • Experience with Integrated System Planner, APD, and Python scripting for SI, PI, and packaging automation.
  • Track record of new product introduction from concept through production.

Culture & Benefits

  • Employee stock purchase plan with a two-year look-back.
  • Bonus and equity plans, including new-hire equity grants and annual equity refreshers.
  • Family support programs and mental health resources.
  • Recognition and service awards.
  • Export-controlled technology access may require eligibility under U.S. regulations and an export license review.

Hiring process

  • Interviews evaluate individual experience, thought process, and communication skills.
  • AI tools, transcription apps, automated answer generators, and automated note-taking bots are not permitted during interviews.

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