AI Silicon, Physical Design Engineer

Location: Mountain View, California, or remote within the United States

Company

hirify.global is developing semiconductor-based computing technology designed to make AI workloads substantially more energy efficient by mapping neural networks directly to device physics.

What you will do

• Own physical implementation of complex, high-performance blocks and top-level SoC integration from RTL through GDSII.
• Lead floorplanning, power-grid design, placement, clock-tree synthesis, routing, and physical verification.
• Drive power, performance, and area optimization in collaboration with architecture teams.
• Own sign-off activities including static timing analysis, IR-drop analysis, electromigration, DRC, LVS, and ERC.
• Develop and automate synthesis, formal verification, parasitic-extraction, and physical-design methodologies.
• Integrate custom analog and mixed-signal blocks and evaluate AI tools for improving chip-design efficiency.

Requirements

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of industry experience in digital physical design and successful tapeouts on modern process nodes; 7nm, 5nm, or newer is preferred.
• Expertise in static timing analysis, timing closure, advanced-node physical-design challenges, power integrity, and noise-coupling mitigation.
• Expert-level experience with Synopsys Fusion Compiler, IC Compiler II, Cadence Innovus, or comparable EDA tools.
• Strong scripting skills in Tcl, Python, or Perl.
• Excellent written and verbal communication skills, including experience managing external vendors or design houses.

Nice to have

• Physical-design experience with machine-learning accelerators or large-scale systolic arrays.
• Experience integrating custom analog macros and managing complex power-sequencing requirements.
• Experience with multi-voltage domains, UPF/CPF flows, and advanced power-gating techniques.
• Familiarity with state-of-the-art AI tools for chip design.

Culture & Benefits

• Work on complex semiconductor and AI-computing problems focused on reducing energy consumption.
• Join a multidisciplinary R&D team with substantial ownership over the computing platform.
• Comprehensive health benefits and 401(k) matching.
• Unlimited paid time off and complimentary meals at the Mountain View office.