Silicon Photonics PIC Layout Engineer

Location: San Jose, California, USA; onsite

Annual base salary: USD 101,000–162,000

Company

A global technology corporation developing semiconductor and infrastructure solutions.

What you will do

• Design and implement photonic integrated circuit layouts.
• Develop and use script-based layout tools.
• Collaborate with design and verification teams to meet layout specifications and performance requirements.
• Perform layout versus schematic (LVS) and design rule checking (DRC).
• Improve layout methodologies and engineering flows.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5+ years of relevant experience, or a master’s degree with 3+ years of relevant experience.
• Strong interest in developing a career in IC layout.
• Familiarity with Cadence layout tools and Electronic Design Automation (EDA) tools.
• Strong attention to detail and problem-solving skills.
• Ability to work onsite in San Jose, California, USA.

Nice to have

• Experience with script-based layout.
• Motivation to learn and work effectively in a fast-paced, collaborative environment.

Culture & Benefits

• Discretionary annual bonus and new-hire and annual equity awards, subject to applicable plans.
• Medical, dental, and vision plans.
• 401(k) participation with company matching and an Employee Stock Purchase Program.
• Paid holidays, sick leave, vacation time, and applicable family and other leave programs.
• Employee Assistance Program.