Silicon Packaging Design Architect

Location: Phoenix, Arizona, United States; on-site presence required

Annual salary: $164,470–$311,890 USD

Company

Develops advanced silicon, semiconductor packaging, and 3D IC technologies for high-performance products.

What you will do

• Translate product requirements into detailed package architecture specifications.
• Make technology trade-off decisions across electrical, mechanical, thermal, reliability, and cost requirements.
• Collaborate with silicon, hardware, package, board design, and EDA partner teams.
• Lead end-to-end package development, including design procedures and continuous quality improvements.
• Troubleshoot packaging designs, materials, and processes with cost-effective solutions.
• Implement silicon-to-board co-design strategies and improve package design tools and methods.

Requirements

• Bachelor’s degree with 6+ years, master’s degree with 4+ years, or Ph.D. with 2+ years of experience in electrical, mechanical, chemical engineering, materials science, or a related STEM field.
• 2+ years of hands-on experience in semiconductor fabrication, chip assembly, or packaging.
• Experience with electromagnetic simulation tools such as Mentor, Cadence, SPICE, Ansys, or similar platforms.
• Experience with Cadence Allegro or Mentor Xpedition platform tools.
• In-depth knowledge of assembly processes, test methodologies, and characterization techniques.
• Ability to work on-site in Phoenix, Arizona, United States.

Nice to have

• 10+ years of experience in package, PCB, or IC digital design.
• Experience optimizing packaging designs for cost and quality.
• Experience with semiconductor fabrication and packaging processes.
• Experience collaborating across multidisciplinary engineering teams.

Culture & Benefits

• Full-time experienced-hire position with Shift 1 working hours.
• Health, retirement, and vacation benefits.
• Stock bonuses and a competitive total compensation package.
• Commitment to responsible business practices and ethical hiring.