Director (Signal Integrity/Power Integrity)

Location: On-site in Santa Clara, CA or Boston, MA. Relocation assistance is available to one of the office hubs.

Company

hirify.global develops infrastructure-layer technologies to improve AI capability and efficiency for high-performance computing architecture.

What you will do

• Develop technical solutions for signal integrity and power integrity across silicon, package, PCB, and system levels.
• Define system-level SI/PI architecture, design guidelines, and layout recommendations.
• Perform end-to-end channel simulations for high-speed serial interfaces and memory subsystems.
• Lead SI/PI analysis and optimization for DDR5, LPDDR5, LPDDR6, and other high-performance memory interfaces.
• Correlate simulations with laboratory measurements and perform root-cause analysis of signal and power integrity issues.
• Collaborate with silicon, package, PCB, architecture, and manufacturing teams while evaluating future package and PCB technologies.

Requirements

• MS or PhD in Electrical Engineering.
• 5+ years of direct industry experience.
• Deep expertise in Signal Integrity and working knowledge of Power Integrity concepts and methodologies.
• Experience with DDR, LPDDR, FPGA, adaptive computing, ASIC, networking, datacenter, or high-performance computing platforms.
• Hands-on experience with laboratory measurements, simulation correlation, PCB/package/IC-level power delivery networks, and SI/PI analysis tools such as ADS and HFSS.
• Strong foundation in electromagnetic theory, transmission lines, and circuit analysis, plus programming experience in Python, C++, or Matlab.

Nice to have

• Experience with HSPICE.
• Experience mentoring engineers and driving technical leadership across organizations.

Culture & Benefits

• Full-time, on-site work from the Santa Clara or Boston office hub.
• Visa sponsorship and relocation assistance are available for an office hub.
• 100% employer-paid health, dental, vision, life, disability, and AD&D insurance.
• 401(k) match with immediate vesting, 20 vacation days, and 15 company holidays.
• Performance-based bonus, early-stage equity grant, daily lunch stipend, fitness and wellness benefits, and access to financial advisors.
• Collaborative, continuous-learning environment focused on rigor, clarity, impact, and high-performance computing architecture.