Design Verification Engineer (AI)

Location: Mountain View, California, United States

Salary: $200,000–$300,000 per year

Company

hirify.global is hiring for a fast-growing AI hardware company developing next-generation AI accelerator technology.

What you will do

• Own a complete verification and testing domain from planning through functional closure.
• Develop verification strategies across IP, subsystem, SoC, full-chip, and emulation environments.
• Drive verification planning, implementation, debugging, and closure for complex accelerator silicon.
• Build and improve verification infrastructure, testbenches, and methodologies.
• Debug functional issues across IP, subsystem, and full-chip designs.
• Collaborate with RTL design, architecture, software, and verification teams while developing AI-assisted and agentic tool flows.

Requirements

• 5+ years of pre-silicon design verification experience.
• End-to-end ownership of verification planning through functional closure.
• Experience with block-level or subsystem verification, CPU subsystems, IP integration, SoC or full-chip verification, emulation, DMA, NoC, or die-to-die protocols.
• Deep experience with UVM methodology and testbench architecture.
• Strong debugging, specification analysis, delivery, and cross-functional collaboration skills.
• Interest in modern automation and AI-assisted verification tooling.

Nice to have

• RISC-V verification or formal verification experience.
• Experience with Palladium, Veloce, or equivalent emulation platforms.
• Post-silicon bring-up experience.
• AI accelerator, GPU, advanced SoC, NoC, DMA, chiplet, or die-to-die architecture experience.