Tech Lead Engineer, Design Verification (AI Connectivity)

Location: San Jose, California, United States

Salary: $175,500–$195,000 per year, depending on experience, level, and business need. Discretionary bonus, incentives, and benefits may also be available.

Company

hirify.global provides rack-scale AI infrastructure through semiconductor-based connectivity solutions and software for high-performance computing systems.

What you will do

• Define block- and subsystem-level verification strategies, plans, scenarios, coverage models, checkers, assertions, and scoreboards.
• Lead verification planning and execution for complex switching functionality, tracking risks, milestones, and quality metrics.
• Build and enhance reusable UVM-based SystemVerilog testbenches, agents, sequences, monitors, and reference models.
• Create directed, constrained-random, and power-on-reset scenarios for PCIe Gen 6/Gen 7, UALink, and UCIe.
• Drive functional and code coverage closure, regression automation, failure triage, and verification quality improvements.
• Partner with architecture, RTL, firmware, design, and post-silicon teams on debugging, root-cause analysis, and silicon bring-up readiness.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 5–8 years of design verification experience with complex ASICs or SoCs.
• Hands-on experience with SystemVerilog and UVM-based verification environments.
• Experience developing verification plans, testbenches, assertions, scoreboards, and functional coverage models.
• Familiarity with simulation, waveform debugging, regression, and coverage tools.
• Strong technical leadership, debugging, communication, and collaboration skills.

Nice to have

• Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Experience with PCIe, UALink, UCIe, or other high-speed connectivity and switching protocols.
• Knowledge of protocol checkers, formal verification, emulation, or hardware acceleration.
• Experience with Python, PowerShell, or Tcl for verification automation and regression infrastructure.
• Understanding of AI or data-center system architectures, including accelerator, memory, and fabric connectivity.

Culture & Benefits

• Work in a fast-paced product development environment focused on high-reliability connectivity products.
• Collaborate with cross-functional engineering teams across architecture, RTL, firmware, design, and post-silicon development.
• Potential eligibility for discretionary bonuses, incentives, and benefits.
• Inclusive workplace encouraging applications from people with diverse backgrounds and experiences.