Design Verification Emulation, Hardware

Location: Austin, Texas or Palo Alto, California

Annual salary: $200,000–$420,000 USD, plus equity

Company

hirify.global is building personal AI through locally deployed hardware, bespoke training infrastructure, next-generation user interfaces, and frontier deep learning research.

What you will do

• Translate IP and SoC verification plans into emulation strategies, workloads, and acceptance criteria.
• Build and maintain models, test components, transactors, and software-driven workloads for simulation acceleration and emulator-hosted verification.
• Develop platform bring-up, compilation, mapping, runtime, regression, and debug infrastructure.
• Analyze failures using traces, waveforms, and platform diagnostics, partnering with RTL and DV owners on closure and emulation signoff.
• Build agentic workflows for workload planning, test preparation, orchestration, failure triage, result analysis, and closure reporting.
• Automate platform usability, regression throughput, and results visibility with scripting and internal tools.

Requirements

• Based in Austin, Texas or Palo Alto, California.
• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, plus 5+ years of industry experience.
• Hands-on experience with Cadence Palladium/Protium, Synopsys ZeBu/HAPS, or comparable emulation platforms, including bring-up, model integration, compilation, execution, and debug.
• Experience with verification planning, regression strategy, closure, and complex IP or SoC verification.
• Proficiency in SystemVerilog, C/C++, and scripting with Python, Tcl, Bash, or similar languages.
• Ability to evaluate workload tradeoffs across runtime, fidelity, observability, and debug.

Nice to have

• Experience with long-running software workloads, firmware and driver validation, pre-silicon software bring-up, or performance and power verification.
• Background developing synthesizable test components, transactors, behavioral models, or emulation-friendly simulation replacements.
• Experience with UVM, coverage-driven verification, SystemVerilog Assertions, CI/CD, workflow management, and EDA infrastructure.
• Experience with CPUs, GPUs, AI accelerators, or complex SoCs.

Culture & Benefits

• Collaborative work across design, verification, software, and infrastructure teams.
• Health, dental, and vision benefits.
• Unlimited paid time off.
• Visa sponsorship is available.
• Relocation support is provided as needed.