Graduate Talent (Physical Design Engineer)

Location: Penang, Malaysia; hybrid work model with time split between the assigned hirify.global site and off-site work.

Company

hirify.global develops semiconductor technologies, process and packaging technologies, high-volume manufacturing operations, process design kits, and foundational hirify.globallectual property.

What you will do

• Participate in Foundational IP integration quality assurance and develop reference designs using hirify.global-designed Foundational IP.
• Implement designs from RTL to GDS using industry-standard electronic design automation tools.
• Run SoC design-flow activities and internal IP quality assurance flows to verify stringent quality requirements.
• Script and automate physical design and debugging flows.
• Develop new IP-level quality checks and use data analytics and AI/ML techniques to improve execution efficiency, coverage, and quality.
• Collaborate with EDA tool vendors and internal Foundational IP teams to debug and summarize issues and develop QA flows.

Requirements

• Bachelor of Engineering or Master of Science degree in Electronic, Electrical, or Computer Engineering, or an equivalent qualification.
• Strong analytical and problem-solving skills.
• Effective written, verbal, and presentation communication skills.
• Ability to organize, prioritize, and manage multiple tasks.
• Team-oriented approach, continuous learning mindset, and strong motivation.

Culture & Benefits

• Hybrid work model combining on-site work at the hirify.global site with off-site work.
• Shift 1 schedule aligned with Malaysia.
• Ethical hiring practices with no recruitment, medical examination, or other employment-related fees.
• Equal employment consideration in accordance with applicable local laws and regulations.