Sr Application Engineer – Sign-Off (ASIC Physical Design)

Location: Penang, Malaysia

Company

hirify.global develops electronic design automation solutions and supports semiconductor customers with digital implementation, physical design, and verification technologies.

What you will do

• Support and drive customer adoption of digital implementation, physical design, and static verification solutions.
• Perform timing closure, power and signal integrity sign-off, and EM/IR sign-off.
• Work on low-power and high-speed designs using advanced technology nodes.
• Participate in or lead next-generation physical design methodology and flow development.
• Collaborate with customer design teams, hirify.global R&D, Product Engineering, and RTL design teams to support successful tapeouts.

Requirements

• BS or MS degree in Electrical Engineering or Computer Science.
• 3+ years of hands-on experience in physical design and verification.
• Experience with ASIC design flows, static timing analysis, and EM/IR analysis.
• Ability to work independently, take ownership of varied technical tasks, and verify, test, and characterize designs.
• Good English communication skills and the ability to work effectively in a team.

Nice to have

• Knowledge of timing and IR-drop closure in 3DIC technologies.

Culture & Benefits

• Opportunity to work on challenging low-power and high-speed semiconductor designs.
• Collaboration with customer engineering, R&D, Product Engineering, and RTL design teams.
• Focus on leadership, innovation, and impactful technology work.