Cryo CMOS Analog Design Engineer (Cryogenic CMOS)

Location: Austin, United States; full-time onsite role with up to 10% travel.

Salary: $118,000–$275,000 annually, determined by qualifications, experience, and location.

Company

hirify.global is a full-service semiconductor foundry providing design, development, and fabrication services for technology companies across a global manufacturing footprint.

What you will do

• Design high-performance analog and mixed-signal CMOS circuits and reusable IP, including amplifiers, references, regulators, data converters, oscillators, PLLs, clocking circuits, and drivers.
• Drive circuit development from architecture and transistor-level design through simulation, layout supervision, physical verification, tapeout, silicon characterization, and design-to-measurement correlation.
• Analyze circuits across process, voltage, and temperature conditions using Monte Carlo, mismatch, noise, stability, linearity, timing, and post-layout parasitic simulations.
• Optimize designs for cryogenic operating temperatures, power constraints, process variation, device behavior, and layout-dependent effects.
• Collaborate with device modeling, PDK, technology, and test teams to improve cryogenic models, design rules, test structures, and characterization plans.
• Lead design reviews, document methodologies and results, mentor engineers, and support customer and technology solutions.

Requirements

• Bachelor’s degree in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or a related field.
• At least 5 years of relevant analog or mixed-signal integrated circuit design experience.
• Experience taking analog or mixed-signal circuits through schematic design, simulation, layout, DRC/LVS, parasitic extraction, tapeout, and silicon validation.
• Strong knowledge of CMOS analog fundamentals, device physics, noise, matching, feedback, stability, frequency response, process variation, and PVT/Monte Carlo analysis.
• Proficiency with analog IC design, SPICE simulation, layout, physical verification, and post-layout extraction environments.
• Fluency in written and verbal English and availability to work in Austin.

Nice to have

• Master’s degree or PhD in Electrical Engineering, Microelectronics, or a related field.
• Experience with cryogenic CMOS, low-temperature circuit design or characterization, quantum-control electronics, precision instrumentation, RF, or advanced analog applications.
• Experience with ADCs/DACs, PLLs, LNAs, VGAs, oscillators, references, LDOs, or high-speed drivers.
• Experience correlating silicon measurements with simulations and working with device modeling, PDK, process technology, or test teams.
• Automation experience using Python, SKILL, Tcl, or equivalent scripting languages.

Culture & Benefits

• Work in a cross-functional semiconductor environment spanning design, technology, PDK, modeling, process, and test teams.
• Support customer and technology solutions for emerging semiconductor and quantum applications.
• Follow Environmental, Health, Safety & Security requirements and programs.
• Employment is subject to applicable pre-employment conditions, laws, and regulations.