Digital Verification Engineer (New Grad) (ASIC)

Location: Taipei, Taiwan

Company

hirify.global develops integrated power semiconductors and systems power delivery architectures for portable and non-portable markets.

What you will do

• Generate test plans from design requirements and product datasheets for digital and mixed-signal ICs.
• Work with digital and analog designers to develop system-level and behavioral models.
• Create verification environments using SystemVerilog and UVM.
• Write digital and mixed-signal test cases, assertions, and checkers.
• Analyze test results, code coverage, and functional coverage, including gate-level verification.
• Develop verification IP, standard tests, automation scripts, and verification environments using industry-standard ASIC tools and flows.

Requirements

• MS degree in Computer Science or Electrical Engineering with emphasis on digital design or VLSI coursework.
• Basic knowledge of ASIC development processes and digital design techniques.
• Knowledge of SystemVerilog, UVM, and behavioral or RTL coding.
• Ability to follow design specifications and procedures and complete tasks aligned with project milestones.
• Strong written and verbal communication, teamwork, and collaboration skills.

Nice to have

• Embedded design or firmware development experience.
• Knowledge of power management applications.
• Experience with I2C, I3C, SPI, USB, or PMBUS.
• Experience with Tcl, Python, or C++ scripting and automation.

Culture & Benefits

• Work in a semiconductor company focused on leading-edge products and innovation.
• Collaborate closely with digital and analog design teams.
• Join an environment that values creativity, sustainability, diversity, and equal opportunity.