Principle Engineer - CAD (Physical Verification)

Location: Hsinchu, Taiwan Development Center; onsite role

Company

hirify.global develops semiconductor technologies and solutions as part of a global organization with approximately 17,000 employees.

What you will do

• Develop physical verification regression test cases to quality-assure physical verification decks.
• Support layout and design engineers with physical verification using Siemens Calibre, Cadence Pegasus, and Synopsys Hercules.
• Develop, verify, and enhance rule decks, including DRC rules, ESD, ERC, voltage-aware DRC, via doubling, and design-for-manufacturability checks.
• Work with Technology Development and Device Engineering on additional devices, layout rules, and foundry requirements.
• Support worldwide remote sites with layout verification and debug physical verification issues.
• Develop flows that improve device quality and reliability.

Requirements

• At least 5 years of experience developing and supporting PDK activities.
• Fluent knowledge of SVRF and TVF.
• Proven ability to debug physical verification issues.
• Experience customizing Calibre Interactive and strong knowledge of Cadence Virtuoso and CalibreDRV.
• Solid understanding of layout rules, device identification concepts, and foundry rules.
• Excellent English verbal and written communication skills are required.

Nice to have

• Experience using AI solutions.

Culture & Benefits

• Full-time employment at a global semiconductor technology organization.
• Access to employee development and leadership growth programs.
• Work environment emphasizing trust, empowerment, respect, diversity, communication, and community.
• Travel requirement of 0%–25%.