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8 дней назад

Director, ASIC Design & Front-End Implementation (Networking ASICs)

Формат работы
onsite
Тип работы
fulltime
Грейд
director
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Director, ASIC Design & Front-End Implementation (Networking ASICs): Leading RTL design and front-end implementation for next-generation networking ASICs from architecture through tapeout, silicon bring-up, and product deployment with an accent on PPA optimization, design quality, and implementation readiness. Focus on coordinating architecture, verification, physical design, software, and post-silicon engineering while driving multiple programs, technical strategy, and AI-assisted methodology improvements.

Location: Onsite, with an expectation of primarily working from an HPE office

Company

hirify.global is a global edge-to-cloud company developing technologies that connect, protect, analyze, and manage data and applications from edge to cloud.

What you will do

  • Lead RTL design and microarchitecture teams delivering next-generation networking ASICs.
  • Drive ASIC execution from architecture and RTL completion through tapeout, silicon bring-up, validation, and product deployment.
  • Partner with Physical Design on floorplanning, timing closure, power optimization, DFT integration, and implementation readiness.
  • Coordinate Architecture, Verification, Emulation, SDK/Software, Physical Design, Post-Silicon Engineering, Product Management, and Product Marketing.
  • Manage schedules, dependencies, risks, milestones, and deliverables across multiple ASIC programs.
  • Lead engineering managers and senior technical contributors while improving methodology, automation, productivity, and AI-assisted engineering workflows.

Requirements

  • BS/MS in Electrical Engineering, Computer Engineering, or a related field.
  • 15+ years of ASIC development experience, including 8+ years leading engineering teams and managers.
  • Expertise in RTL design, Verilog/SystemVerilog, microarchitecture, synthesis, CDC, linting, timing closure, and ASIC implementation flows.
  • Proven experience delivering complex ASICs from concept through production.
  • Strong cross-functional leadership, communication, and program execution skills across architecture, verification, physical design, software, emulation, and post-silicon engineering.

Nice to have

  • Experience with networking ASICs, switching and routing architectures, packet processing, QoS, security, telemetry, or AI networking solutions.
  • Experience with silicon bring-up, validation, and post-silicon debugging.
  • Experience collaborating with Product Management and Marketing on roadmap planning.
  • Experience leading globally distributed engineering organizations.
  • Experience driving methodology, automation, productivity improvements, and AI-assisted engineering workflows.

Culture & Benefits

  • Health, financial, and emotional wellbeing benefits are available.
  • Professional development programs support career growth and movement across divisions.
  • Inclusive workplace focused on varied backgrounds, individual uniqueness, innovation, and continuous learning.
  • Work and personal needs are supported through flexible management practices.

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