RTL Intern (AI Hardware)

Location: On-site at the office in San Jose, CA, United States

Company

hirify.global builds inference-focused AI hardware by co-designing chips, racks, software, and manufacturing systems.

What you will do

• Design microarchitecture and implement logic in Verilog.
• Develop RTL blocks for modern machine learning architectures.
• Participate in microarchitecture discussions, synthesis, and timing feedback.
• Contribute to verification work and write test benches.
• Work across engineering and research disciplines throughout the ASIC design cycle.

Requirements

• Progress toward a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
• Familiarity with high-speed digital logic and ASIC or SoC design concepts.
• Familiarity with SystemVerilog, UVM, or Python.
• Exposure to verification, test benches, physical design flows, and related tooling.
• Ability to learn quickly about transformers and modern artificial intelligence.
• Ability to work fully in person in San Jose.

Nice to have

• Familiarity with modern ML and LLM model architectures.
• Knowledge of numerical representations and functions.
• Familiarity with clocking and reset schemes.
• Programming experience with Python or another scripting language.

Culture & Benefits

• 12-week paid internship program.
• Generous housing support for candidates relocating.
• Daily lunch and dinner at the office.
• Direct mentorship from industry leaders and experienced engineers.
• Fully in-person work in San Jose with opportunities to contribute across engineering and research.