RTL Intern (AI Hardware)

Location: On-site at the office in San Jose, California

Company

hirify.global co-designs chips, racks, software, and manufacturing systems for high-throughput, low-latency AI inference.

What you will do

• Design microarchitecture and implement logic in Verilog.
• Develop RTL blocks for machine learning hardware architectures.
• Participate in the full design cycle, from microarchitecture discussions through synthesis and timing feedback.
• Contribute to verification work and write test benches.
• Work across engineering and research disciplines on inference-focused AI systems.

Requirements

• Progress toward a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
• Familiarity with high-speed digital logic and ASIC or SoC design concepts.
• Familiarity with SystemVerilog, UVM, or Python.
• Exposure to verification, test benches, physical design flows, and related tooling.
• Ability to learn quickly about transformers and modern artificial intelligence.

Nice to have

• Familiarity with modern ML and LLM model architectures.
• Knowledge of numerical representations and functions.
• Experience with clocking and reset schemes.
• Ability to program with Python or another scripting language.

Culture & Benefits

• 12-week paid internship based in San Jose.
• Housing support for candidates relocating to the area.
• Daily lunch and dinner at the office.
• Direct mentorship from experienced engineers and industry leaders.
• Fully in-person environment with cross-disciplinary engineering and research work.