ASIC Engineer Intern

Location: Ottawa, Canada

Salary: $25.50–$35.00 per hour

Company

hirify.global builds high-speed connectivity infrastructure and networking technology for the AI era.

What you will do

• Develop automation infrastructure for next-generation ASIC devices.
• Support ASIC design, layout, integration, and verification activities for optical communications DSPs.
• Develop design blocks and evaluate designs for correctness and performance.
• Implement netlists into silicon-realizable layouts and automate placement and extraction workflows.
• Create constraints, analyze implementation reports, and automate ASIC integration processes.
• Develop reusable SystemVerilog/UVM verification components and improve Python-based reporting, simulation, build, and debugging workflows.

Requirements

• Programming experience with one or more of Java, Python, TCL, Skill/Ocean, or SystemVerilog.
• Familiarity with Linux-based development environments.
• Ability to work in Ottawa, Canada.
• Availability for a 4-month work term starting in January 2027, extendable to 8 months.

Nice to have

• Previous experience with ASIC or FPGA development programs.
• Strong analytical and debugging skills.
• Familiarity with Agile, JIRA, Confluence, and Git.

Culture & Benefits

• Access to the Employee Assistance Program.
• Company-paid holidays.
• Paid sick leave and vacation pay as required by applicable laws.
• Work in an environment focused on innovation, integrity, collaboration, diversity, and inclusion.