4 дня назад
Senior Engineer II - Physical Design
86 000 - 186 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Senior Engineer II - Physical Design (ASIC/SOC): Developing large and complex SOCs and ASICs through block-level place and route, physical design verification, synthesis, and static timing with an accent on high-performance, high-speed, low-power chip implementation. Focus on leading full-chip physical design, optimizing floorplans and clock trees, debugging design issues, and coordinating implementation across CAD, packaging, mixed-signal, operations, design, and customer teams.
Location: Burnaby, British Columbia, Canada. The role is based in the Burnaby office and includes 0–25% travel.
Annual base salary: $86,000–$186,000, plus restricted stock units and quarterly bonus payments.
Company
develops semiconductor products and solutions used in technologies around the world.
What you will do
- Execute chip development methodologies for block-level place and route, physical design verification, synthesis, and static timing.
- Develop macro-level test structures and digital wrappers for analog cells.
- Lead physical design activities for full-chip, subsystem, CPU, and mixed-signal blocks.
- Support customers through the chip development flow and collaborate with CAD, packaging, mixed-signal, operations, and design teams.
- Build large and complex SOCs and ASICs using advanced tools and implementation flows.
Requirements
- Four-year degree in Electrical or Electronics Engineering and 7.5+ years of ASIC development experience.
- Hands-on experience with design, synthesis, static timing, place and route, floorplanning, placement optimization, clock tree synthesis, and physical verification.
- Advanced knowledge of semi-custom design and implementation tools, with recent full-chip physical design leadership experience.
- Proficiency in Python, Perl, and Tcl scripting; ability to understand Verilog and VHDL.
- Strong analytical, debugging, communication, collaboration, and autonomous working skills.
- Ability to guide others, adapt to new methodologies and technologies, and work across geographically diverse teams.
Nice to have
- Experience with 6 nm or smaller semiconductor processes.
Culture & Benefits
- Full-time employment in an office-based team environment.
- Health benefits beginning on the first day.
- Retirement savings plans and an industry-leading employee stock purchase program with a six-month look-back feature.
- Leadership and employee development programs.
- Additional compensation may include restricted stock units and quarterly bonus payments.
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