PCB Layout Engineer (HDI)

Location: Taipei, Taiwan; on-site

Company

hirify.global develops ASIC-based AI inference systems purpose-built for transformer models and high-performance data center products.

What you will do

• Design and optimize high-speed PCB layouts with Cadence Allegro for 100G signaling.
• Implement impedance matching, trace routing, crosstalk mitigation, and signal-integrity strategies.
• Develop power distribution networks, including power planes, decoupling, and thermal-management solutions.
• Design complex multilayer HDI PCB stack-ups using blind, buried, and microvias.
• Collaborate with electrical and mechanical engineering teams on system integration, design reviews, performance, and manufacturability.

Requirements

• Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related field.
• Approximately 10 years of PCB layout design experience focused on high-speed signaling, power distribution, and HDI stack-ups.
• Proficiency with Cadence Allegro PCB design tools.
• In-depth knowledge of high-speed digital design, signal integrity, and impedance control.
• Experience with complex HDI PCB design and manufacturing processes.
• Understanding of power distribution network design and thermal management for data center applications.

Nice to have

• Advanced degree or relevant certifications.

Culture & Benefits

• Fully in-person engineering work in Taipei or San Jose.
• Opportunity to contribute across engineering and research as needed.
• Competitive compensation with equity packages.
• Comprehensive insurance coverage and other benefits.
• US onboarding experience at the Silicon Valley headquarters.