Principal Layout Engineer (Analog)

Location: Catania, Italy

Salary: €61,000–€83,900 gross annual base salary

Company

hirify.global develops semiconductor solutions for consumer and automotive applications, including custom analog and high-speed interface products.

What you will do

• Develop and lead block-level and top-level analog and mixed-signal layouts for analog-on-top and digital-on-top projects.
• Drive floorplanning, power routing, ESD implementation, multiple-voltage-domain integration, and chip integration.
• Run and debug DRC, LVS, ERC, and extraction flows.
• Collaborate with circuit design, digital P&R, IO, ESD, package, test, and PDK teams.
• Provide layout schedules, technical leadership, customer communication, and risk resolution.
• Improve layout methodologies and automation.

Requirements

• BSEE or MSEE.
• 10+ years of custom analog or mixed-signal layout experience in deep sub-micron CMOS.
• Expertise in Cadence Virtuoso XL, floorplanning, constraint-driven layout, and PVS DRC/LVS/ERC.
• Strong knowledge of matching, common-centroid layout, shielding, EM/IR, high-speed routing, parasitics, and DFM practices.
• Experience leading analog-on-top and digital-on-top chip layouts, including floorplanning, power distribution, ESD, and multiple voltage domains.
• Fluent English and strong communication and cross-functional leadership skills.

Nice to have

• Experience with PLL, oscillator, ADC, DAC, LDO, bandgap, and high-speed interface circuits.
• SKILL or Perl scripting experience.

Culture & Benefits

• Work on complex mixed-signal ICs for consumer and automotive applications.
• Contribute to custom silicon solutions from concept through tapeout.
• Employment follows the applicable Italian Metalmeccanica Industria National Collective Labour Agreement.
• Additional compensation may include annual incentives, equity, and a competitive benefits package.