Principal Product Engineer (ASIC)

Location: Austin, United States

Company

hirify.global develops software tools and platforms for advanced chip design, including digital implementation and signoff.

What you will do

• Support products in the Digital and Signoff Group.
• Track and debug customer issues and coordinate resolution with R&D and release teams.
• Provide technical expertise in place-and-route methodologies to customers and R&D.
• Run design benchmarks and develop implementation flows and solutions.
• Analyze ASIC designs across the RTL-to-GDSII flow, including timing closure and PPA optimization.

Requirements

• MS in Electrical Engineering and 5+ years of digital implementation experience, or BS in Electrical Engineering and 8+ years of experience.
• Strong understanding of VLSI physical design, timing analysis, RTL synthesis, placement optimization, clock tree synthesis, routing optimization, and silicon signoff.
• Experience with industry-standard EDA tools for synthesis, physical design, and signoff at 16nm and below nodes.
• Understanding of hierarchical and low-power design methodologies.
• Strong analytical, problem-solving, verbal, and written communication skills.
• Automation experience with Perl, Tcl, and shell scripting.

Culture & Benefits

• Work with R&D and Customer Engagement teams in a technology-focused environment.
• Opportunity to influence the development of advanced chip-design software.
• Collaborative work focused on solving complex customer and engineering problems.