4 дня назад
Principal Physical Design Engineer (AI)
300 000 - 400 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Principal Physical Design Engineer (AI): Owning the complete physical implementation of critical blocks for a high-performance AI accelerator SoC from floorplanning through final tapeout signoff with an accent on place and route, clock tree synthesis, timing closure, power optimization, and physical verification. Focus on developing AI-assisted implementation methodologies, optimizing performance, power, and area, and resolving complex implementation challenges with EDA vendors and foundry partners.
Location: US-based opportunities including Mountain View, Boulder, the San Francisco Bay Area, San Mateo, Virginia, and remote work across Eastern and Central Time Zones in the US; onsite work is available in the Bay Area.
Salary: $300,000–$400,000 annually, with additional equity participation.
Company
Early-stage AI hardware startup building a next-generation inference platform that combines custom silicon with integrated software and systems engineering.
What you will do
- Own the complete physical design flow for major SoC blocks from floorplanning through final signoff.
- Drive place and route, clock tree synthesis, timing closure, power optimization, and physical verification.
- Develop and apply AI-assisted implementation methodologies to improve productivity and accelerate tapeout schedules.
- Partner with architecture, RTL, verification, and software teams to optimize performance, power, and area.
- Collaborate with EDA vendors and foundry partners to resolve implementation challenges and deliver production-ready silicon.
Requirements
- 8+ years of physical design experience for complex, high-performance ASICs at advanced process nodes of 7nm or below.
- Deep expertise in synthesis, place and route, clock tree synthesis, timing closure, physical verification, and signoff.
- Hands-on experience with Cadence Innovus, Synopsys Fusion Compiler, or comparable implementation platforms.
- Experience with PrimeTime, Tempus, or equivalent industry-standard signoff tools.
- Proven ability to work cross-functionally with architects, RTL engineers, EDA vendors, and foundries.
Nice to have
- Experience with advanced packaging technologies such as 2.5D, 3D, or CoWoS.
- Experience with IR/EM analysis, thermal optimization, signal integrity, or DFT-aware implementation.
Culture & Benefits
- Work with an engineering team experienced in semiconductor and AI companies.
- Help shape first-generation accelerator silicon and future product generations.
- Medical, dental, and vision coverage.
- 401(k) and generous paid time off.
- Meaningful equity participation in addition to base salary.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →
Похожие вакансии
10 дней назад
Principal Physical Design Engineer (ASIC/SoC)
180 000 - 260 000$
Tenstorrent
10 дней назад
Physical Design CPU Methodology Engineer (AI/ML)
100 000 - 500 000$
6 дней назад
Senior ASIC Physical Design Engineer (Space)
170 000 - 250 000$
8 дней назад
Senior ASIC Front-End Design Engineer (Automotive Networking)
200 000 - 300 000$
10 дней назад
Senior PDK Support Engineer (Physical Verification)
173 660 - 330 340$
6 дней назад
Principal ASIC Design Verification Engineer
190 000 - 285 000$