Advanced Packaging Lead/Architect (ASIC)

Location: Penang, Malaysia or Singapore

Company

hirify.global develops Bitcoin mining technology, ASIC chips, mining infrastructure, and AI cloud capabilities.

What you will do

• Define packaging roadmaps and product architectures covering structures, die placement, substrate stack-ups, interconnects, and power delivery.
• Lead chip–package–board co-design, including bump and ball maps, layout, routing, manufacturability, cost, yield, and delivery risk assessment.
• Direct signal integrity, power integrity, thermal, and thermomechanical analysis, including models, design budgets, margins, and signoff criteria.
• Coordinate prototype testing, simulation-to-measurement correlation, root-cause analysis, qualification, yield improvement, and production ramp.
• Manage technical interfaces with foundries, assembly and test partners, substrate vendors, product teams, test teams, and quality teams.
• Recruit and develop packaging design and simulation engineers while establishing design reviews, documentation, version control, and engineering change practices.

Requirements

• Bachelor’s degree or higher in electrical engineering, microelectronics, materials, mechanical engineering, or a related field.
• 10+ years of relevant chip packaging design or development experience.
• Ownership of at least one complex packaging project from architecture through validation and volume production.
• Knowledge of flip-chip/FC-BGA, substrate design, materials, assembly processes, high-speed interconnects, power delivery, cooling, and reliability trade-offs.
• Hands-on expertise in package design, signal integrity, power integrity, thermal analysis, or thermomechanical analysis, with experience guiding multidisciplinary signoff.
• Team leadership, supplier technical management, EDA or simulation tool usage, and effective technical communication and documentation in English.

Nice to have

• Advanced packaging experience in 2.5D/3D design, simulation, or production.
• Experience with chiplets, heterogeneous integration, interposers, RDL, TSVs, microbumps, or hybrid bonding.
• Experience with CPUs, GPUs, switch chips, high-performance ASICs, large or high-power packages, or advanced packaging and substrate supply chains.

Culture & Benefits

• Inclusive environment valuing authenticity and diverse perspectives.
• Startup-oriented atmosphere with opportunities to work on new projects and systems.
• Autonomy, personal accountability, and opportunities for professional growth.
• Training, mentoring, welfare benefits, and developmental opportunities.
• Opportunity to contribute to digital asset and AI infrastructure projects.