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3 дня назад

Design Verification Architect / Director (SystemVerilog)

185 500 - 344 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
director
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Design Verification Architect / Director (SystemVerilog): Leading processor-core and peripheral verification for complex CPU designs with an accent on verification planning, reusable testbench development, and coverage closure. Focus on managing a 7–10-person team, implementing simulation and emulation environments, and coordinating verification scope across architecture, design, firmware, and DV teams.

Location: San Jose, California or Austin, Texas, United States

Annual salary: $185,500–$344,500, plus potential incentive compensation, equity, and benefits.

Company

hirify.global develops technology and software for advanced electronic design and processor development.

What you will do

  • Lead and run the Processor Verification team responsible for microprocessor cores and peripherals.
  • Create verification plans and execute verification for highly complex CPU designs.
  • Implement simulation and emulation testbenches, assembly and C diagnostics, assertion checkers, and coverage monitors.
  • Collect coverage and drive coverage closure against verification goals.
  • Work with DV, architecture, design, and firmware teams to define verification scope.
  • Track and report the work of 7–10 engineers.

Requirements

  • 17+ years of design verification experience.
  • Bachelor’s degree or higher in electrical engineering or computer engineering.
  • Proven experience leading or managing a team, with strong leadership and interpersonal skills.
  • Expertise in computer architecture, processor verification, and design verification fundamentals.
  • Thorough knowledge of SystemVerilog, UVM, and programming languages for building flexible, reusable testbenches.
  • Experience with assembly programming, scripting languages such as Perl or Unix shell, automated flows, and gate-level simulation.

Nice to have

  • Experience with in-order or out-of-order CPU cores and memory subsystems.
  • Experience with formal verification.

Culture & Benefits

  • Paid vacation and holidays.
  • 401(k) plan with employer match.
  • Employee stock purchase plan.
  • Medical, dental, and vision plan options.
  • Potential bonus, equity, and other incentive compensation.

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