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15 часов назад

Senior IC Design Verification Engineer (SystemVerilog/UVM)

110 600 - 152 000CAD
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior IC Design Verification Engineer (SystemVerilog/UVM): Verifying Ethernet and networking IP cores for next-generation SoCs supporting automotive, industrial, and edge computing markets with an accent on UVM-based verification, coverage analysis, and verification infrastructure. Focus on building directed and random tests, debugging hardware failures, analyzing performance-versus-complexity trade-offs, and improving verification methodologies.

Location: Kanata, Canada

Salary: $110,600–$152,000 CAD per year

Company

Develops semiconductor products, embedded processing platforms, networking IP, microcontrollers, processors, and SoC solutions for automotive, IoT, networking, industrial, edge, and telecommunications markets.

What you will do

  • Verify Ethernet and networking IP for next-generation SoCs used in automotive, industrial, and edge computing products.
  • Architect, design, and implement UVM verification for hardware IP and SoC products.
  • Build directed and constrained-random verification tests and review functional and code coverage.
  • Debug test failures, identify root causes, and resolve defects with architects and design engineers.
  • Perform performance-versus-complexity trade-off analysis and drive verification methodology improvements.
  • Prepare functional, implementation, and project-phase documentation while coordinating with IP architecture, design, and verification teams.

Requirements

  • 5+ years of experience with IP and System-on-Chip products.
  • Thorough knowledge of SystemVerilog and UVM verification.
  • Experience with EDA tools, verification flows, and scripting in Python, TCL, Perl, Makefile, and Shell.
  • Experience architecting and implementing design verification infrastructure and executing the full verification cycle.
  • Experience with Git and familiarity with hardware/software implementation trade-offs.
  • Bachelor’s degree in Computer Science, Engineering, or a related field, plus strong problem-solving, communication, and documentation skills.

Nice to have

  • Formal and functional safety verification experience.
  • Knowledge of networking technologies, including TCP/IP protocols.
  • Experience with routers, bridges, switches, security, or cryptography.
  • Algorithm development experience.

Culture & Benefits

  • Work within an experienced R&D team developing IP for multiple product lines.
  • Health, dental, vision, wellness, savings programs, and RRSP benefits.
  • Competitive benefits, incentive compensation, and equity for certain roles.

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