обновлено 3 дня назад
Analog Mixed Signal Design Engineer
129 740 - 183 170CAD
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Analog Mixed Signal Design Engineer (Mixed-Signal Verification/STA): Developing and verifying next-generation mixed-signal IP with an accent on static timing analysis, analog circuit simulation, and timing closure across analog-digital interfaces. Focus on debugging complex testbenches, building behavioral models, optimizing circuit performance, and advancing verification automation with Python and AI technologies.
Location: Remote work from the greater metropolitan area of Toronto, Ontario, Canada; the role will transition to a hybrid model requiring on-site presence at least four days per week once the Toronto office is operational.
Annual salary: CAD 129,740–183,170.
Company
's Central Engineering Group develops scalable engineering solutions for product enablement, custom ASIC, and foundry enablement.
What you will do
- Lead static timing analysis and timing closure across analog-digital interfaces.
- Execute analog circuit simulations, develop testbenches, and optimize schematics using Cadence ADE.
- Perform mixed-signal verification, including behavioral modeling and timing analysis.
- Analyze power, performance, and reliability results and resolve complex simulation issues.
- Collaborate with analog designers, digital architects, RTL teams, and physical design engineers on pre-silicon challenges.
- Improve verification methodologies and automation using scripting and emerging AI technologies.
Requirements
- Bachelor's degree in Electrical or Computer Engineering or a related STEM field, plus 2+ years of industry experience.
- 2+ years of experience with mixed-signal verification and methodology initiatives.
- 2+ years of experience with scripting languages such as Python for automation.
- Strong analytical, problem-solving, and communication skills.
- Must live and work in Canada, initially from the greater metropolitan area of Toronto, Ontario.
Nice to have
- Postgraduate degree in Electrical or Computer Engineering or a related STEM field.
- Experience with SerDes, PLLs, static timing analysis, and analog circuit design.
- Experience with Cadence ADE, Verilog-A, SystemVerilog, and AI-assisted automation.
Culture & Benefits
- Collaborative work with analog designers, system architects, RTL teams, and physical design engineers.
- Initially fully home-based, with occasional site attendance based on business needs.
- Hybrid work model after the Toronto office becomes operational.
- Accessibility accommodations are available for applicants and employees with disabilities.
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