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5 дней назад

Senior Design Verification Engineer (AI)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Design Verification Engineer (AI) (SystemVerilog/UVM): Building and validating complex connectivity silicon for rack-scale AI infrastructure with an accent on scalable verification environments, C/C++ integration, and protocol verification. Focus on developing constrained-random tests, closing coverage, and debugging failures across simulation, co-simulation, and FPGA-based emulation.

Location: Toronto, Ontario, Canada. Authorization to work in Canada is required.

Company

hirify.global provides rack-scale AI infrastructure through semiconductor-based connectivity solutions and a software suite integrating CXL, Ethernet, NVLink, PCIe, and UALink technologies.

What you will do

  • Build and maintain UVM-based verification environments with SystemVerilog and C/C++ integration through DPI/PLI.
  • Translate design specifications into verification plans, test strategies, reusable sequences, and VIP abstraction layers.
  • Create directed and constrained-random tests, transaction-level sequences, assertions, and cover properties.
  • Automate verification infrastructure and regression workflows using Python or Perl.
  • Debug failures across simulation, co-simulation, and FPGA-based emulation in collaboration with RTL designers.
  • Verify PCIe, Ethernet, InfiniBand, DDR, NVMe, and USB protocols using third-party verification IP.

Requirements

  • Bachelor’s degree in Electrical Engineering or a related field.
  • 2–5 years of experience developing or verifying complex SoC or silicon products.
  • Production experience with SystemVerilog, UVM, and C/C++.
  • Experience integrating C/C++ with SystemVerilog environments through DPI or PLI.
  • Experience developing verification infrastructure and tests in directed and constrained-random environments.
  • Strong debugging, prioritization, collaboration, and communication skills.

Nice to have

  • Experience verifying PCIe across physical, link, and transaction layers.
  • Experience with DDR4, DDR5, or HBM memory technologies.
  • Experience with FPGA-based verification or emulation.
  • Experience verifying Ethernet across PMA, PCS, and MAC layers.
  • Experience debugging SoC software, including kernels, device drivers, or U-Boot.

Culture & Benefits

  • Work on connectivity products for next-generation AI infrastructure.
  • Collaborate with hyperscalers, ecosystem partners, RTL designers, and verification engineers.
  • Contribute across the full verification lifecycle in a hyper-growth connectivity company.
  • Work on high-bandwidth systems connecting CPUs, GPUs, memory, storage, and networking devices.

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