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5 дней назад

Principal ESD Engineer (Semiconductor)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Principal ESD Engineer (Semiconductor): Driving ESD architecture, custom protection devices, ESD IP development, and sign-off verification for advanced-node semiconductor products with an accent on FinFET technologies, high-speed interfaces, and mixed-signal SoCs. Focus on developing automated verification flows, supporting HBM/CDM/TLP characterization, and solving ESD-related failures across complex cross-functional engineering environments.

Location: Chandler, Arizona, or Palm Bay, Florida; remote work is not available

Company

hirify.global is an embedded semiconductor solution provider developing technology for automotive, industrial, infrastructure, and IoT applications.

What you will do

  • Lead ESD architecture development for advanced-node semiconductor products, including FinFET technologies and high-speed interfaces.
  • Design and optimize custom ESD protection devices, clamps, and ESD IP solutions.
  • Provide co-design support to balance product performance with ESD protection robustness.
  • Lead ESD sign-off reviews and risk assessments for complex SoCs and mixed-signal products.
  • Develop automated ESD verification methodologies and flows, including support for Calibre PERC or equivalent tools.
  • Support silicon characterization using HBM, CDM, TLP, VF-TLP, and Latch-Up testing, and drive root-cause analysis of ESD failures.

Requirements

  • M.S. or Ph.D. in Electrical Engineering or a related field.
  • 10+ years of semiconductor ESD design experience.
  • Strong knowledge of ESD device physics, HBM, CDM, TLP, VF-TLP, Latch-Up, advanced CMOS, and FinFET technologies.
  • Hands-on experience designing ESD protection for FinFET SoCs and SerDes products, including custom ESD cells and IP.
  • Experience with ESD sign-off methodologies, verification techniques, and Calibre PERC or equivalent tools.
  • Leadership, technical writing, collaboration, and communication skills for working across global engineering teams.

Nice to have

  • Experience developing and maintaining Calibre PERC rule decks.
  • Experience supporting AI, HPC, networking, memory, or data-center products.
  • Experience with IEC/EMC or system-level ESD considerations.

Culture & Benefits

  • Regular permanent employment with a competitive benefits package.
  • Collaboration with global teams across Japan, Europe, and Asia.
  • Work in a culture based on transparency, agility, global collaboration, innovation, and entrepreneurship.
  • Opportunity to contribute to semiconductor technology used across automotive, industrial, infrastructure, and IoT applications.

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