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3 дня назад

Package Design Principal Engineer (High-Speed IC Packaging)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
India
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Текст:
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TL;DR
Package Design Principal Engineer (High-Speed IC Packaging): Developing advanced microelectronic packages from concept through tapeout with an accent on C4 and BGA ball maps, netlist mapping, die placement, and package-level connectivity. Focus on optimizing high-pin-count package designs for signal and power integrity, manufacturability, reliability, and system co-design.

Location: Bangalore, India

Company

hirify.global develops semiconductor solutions and advanced packaging technologies for enterprise, cloud, AI, and carrier infrastructure.

What you will do

  • Drive high-speed microelectronic package development from concept through tapeout.
  • Partner with package architects and technical leads to select technologies that meet manufacturability, performance, reliability, and cost requirements.
  • Develop C4 and BGA ball maps optimized for signal integrity, power integrity, and layout efficiency.
  • Plan and validate netlist mappings across dies, interposers, and substrates, including die placement, padstacks, net assignments, and package-level connectivity.
  • Create and maintain Package Requirement Documents covering die arrangements, stackups, and design constraints.
  • Collaborate with chip, board design, and electrical simulation teams on package and system co-design.

Requirements

  • 13–16 years of related professional experience.
  • Experience developing netlists, schematics, C4 and BGA ball maps for large, complex, high-pin-count packages.
  • Proficiency with Cadence OrbitIO, Integrity System Planner, or equivalent tools.
  • Strong understanding of package design rules, breakout, place and route, signal shielding, reference planes, power distribution, and pinout optimization.
  • Knowledge of signal and power integrity fundamentals, packaging architectures such as 2D, 2.5D, CoWoS, EMIB, CPO, and CPC, plus thermal and mechanical constraints.
  • Experience with package process and flow development, library maintenance, basic scripting, foundry design rules, and substrate manufacturing constraints.

Nice to have

  • Experience running and interpreting signal and power simulations.
  • Experience contributing to tool, process, and flow development.
  • Experience collaborating across global time zones.

Culture & Benefits

  • Eligible for bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
  • Competitive compensation and benefits.
  • Collaborative, transparent, and inclusive work environment.
  • Resources and opportunities for professional growth and development.
  • Employment may require eligibility to access export-controlled technology and completion of an export license review where applicable.

Hiring process

  • Interviews assess individual experience, thought process, and communication skills.
  • AI tools, transcription apps, automated answer generators, and automated note-taking bots are not permitted during interviews.

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