Principal Electrical Engineer, ASIC Program Lead (ASIC)

Location: On-site in San Diego, California, United States

Salary: $160,000–$260,000 annually, plus potential discretionary bonuses and/or equity grants.

Company

hirify.global develops non-surgical brain–computer interfaces and implantable medical-device systems designed to restore digital interaction for people with paralysis and support cognitive health.

What you will do

• Lead the custom ASIC program from concept and specification through verification, silicon bring-up, qualification, and production release.
• Own ASIC requirements and architecture tradeoffs for neural signal acquisition, analog front-end performance, digital data paths, power, testability, reliability, manufacturability, and system integration.
• Drive analog, digital, mixed-signal, and system-level verification, including low-noise AFE performance, timing, interfaces, signal integrity, and high-channel-count data handling.
• Serve as the technical interface with ASIC vendors, semiconductor design partners, foundries, packaging partners, and production test resources.
• Lead pre-silicon and post-silicon debugging, characterization, root-cause analysis, corrective actions, and manufacturing issue resolution.
• Partner with firmware, signal processing, mechanical, clinical, quality, regulatory, and manufacturing teams on product performance and reliability.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 10+ years of experience in electrical engineering, mixed-signal systems, ASIC/SoC development, or high-reliability electronic products.
• Required: ownership of at least one custom ASIC program from concept and specification through verification, silicon bring-up, qualification, and production release.
• Strong analog or mixed-signal expertise in low-noise analog front ends, sensor interfaces, neural signal acquisition, biopotential measurement, ADC interfaces, and microvolt-level signals.
• Strong digital background covering data-path architecture, multiplexing, serialization, timing, clock-domain crossing, low-power design, and high-channel-count data integrity.
• Experience with ASIC development flows, verification plans, external semiconductor partners, laboratory debugging, regulated product development, IEC 60601, ISO 13485, design controls, risk management, and technical documentation.

Nice to have

• Experience with implantable, wearable, or high-reliability medical devices, neural recording, bioinstrumentation, or electrophysiology.
• Experience with ultra-low-power ASICs, low-leakage circuits, power domains, substrate noise, crosstalk, coupling, and packaging parasitics.
• Familiarity with Verilog, VHDL, SystemVerilog, UVM, EDA tools, and ASIC verification methodologies.
• Experience with Python, MATLAB, C/C++, Tcl, production test, yield improvement, reliability testing, or supplier qualification.

Culture & Benefits

• Cross-functional collaboration with electrical, firmware, signal processing, clinical, quality, regulatory, manufacturing, and semiconductor teams.
• Medical and dental insurance for eligible US full-time employees and dependents.
• Life insurance, short- and long-term disability coverage, 401(k), flexible spending account, and commuter benefits for eligible New York employees.
• Discretionary unlimited paid time off.
• Visa sponsorship is not available for this position.