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11 дней назад

Semiconductor Research Integration Engineer

141 910 - 200 340$
Формат работы
onsite
Тип работы
fulltime
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Semiconductor Research Integration Engineer (Semiconductor Process Integration): Developing and transferring semiconductor process technologies from research into high-volume manufacturing with an accent on CMOS device physics, novel materials, process integration, and electrical and physical characterization. Focus on designing experiments, analyzing process and manufacturing data, solving yield and scalability challenges, and coordinating technology transfers across multidisciplinary engineering teams.

Location: Hillsboro, Oregon, United States; regular onsite presence required

Annual salary: $141,910–$200,340 USD

Company

hirify.global develops semiconductor technologies and conducts research across device physics, materials, process technology, circuits, and systems.

What you will do

  • Drive semiconductor design, simulation, development, and process integration activities for research projects.
  • Conduct process feasibility studies and develop solutions to improve performance, reliability, scalability, yield, quality, and safety.
  • Enhance process flows through novel materials and collaborate with integration, module, device, TCAD, design, analytical, supplier, and technician teams.
  • Plan and conduct experiments, characterize processes, and support development from academic and consortium engagements through internal research and technology transfer.
  • Use device fabrication, electrical testing, materials characterization, and big data analysis to identify process and manufacturing tool opportunities.
  • Transfer technologies to development teams and communicate results, schedules, resource requirements, and technology roadmap risks.

Requirements

  • PhD in Electrical Engineering with hands-on semiconductor processing and research and development experience.
  • 2+ years of experience in device physics, semiconductor process technologies, or materials science.
  • 2+ years of experience designing experiments and using statistical analysis tools such as JMP or equivalent.
  • 2+ years of experience with electrical characterization, including CV-IV testing and pulse generation, and physical characterization methods such as SEM, TEM, and XRD.
  • Knowledge of CMOS process technology and solid-state physics, with experience in integration schemes, electrical test metrics, or defect analysis.
  • Familiarity with lithography, etch, packaging, multidisciplinary collaboration, and research initiative leadership.

Culture & Benefits

  • Collaborative, multidisciplinary research environment involving engineering, technician, academic, consortium, supplier, and development partners.
  • Health, retirement, vacation, stock bonus, and other total compensation benefits.
  • Shift 1 work schedule with an onsite work model.

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