4 часа назад
Senior Engineer II - CAD (Physical Verification)
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Senior Engineer II - CAD (Physical Verification) (Semiconductor Physical Verification): Developing and supporting backend physical verification flows, rule decks, and regression test cases for semiconductor design across multiple process technologies with an accent on Calibre, Pegasus, Hercules, and foundry-rule verification. Focus on debugging DRC/LVS/PERC issues, automating verification procedures, and improving design quality, reliability, and manufacturability.
Location: Chandler, Arizona, United States; onsite
Company
develops semiconductor products and technology solutions for applications across the technology industry.
What you will do
- Develop physical verification regression test cases for multiple PDKs and process technologies.
- Support layout and design engineers with DRC, LVS, PERC, ERC, and other physical verification activities.
- Develop, verify, and enhance rule decks and foundry design rules.
- Debug physical verification issues using RVE, Vue, and other EDA visualizers.
- Collaborate with Technology Development and Device Engineering on DRC rules, device development, and design-for-manufacturing checks.
- Support remote sites worldwide and develop flows that improve device quality and reliability.
Requirements
- Bachelor’s degree in Electrical Engineering or a related field and 7.5–10 years of experience developing and supporting physical verification activities.
- Expertise with Siemens Calibre and/or Cadence Pegasus DRC, LVS, and PERC tools.
- In-depth knowledge of Calibre DesignRev scripting and fluency with SVRF and TVF.
- Experience with Calibre Interactive, CalibreDRV, Cadence Virtuoso, and physical verification visualizers.
- Programming skills in Tcl/Tk, Perl, Python, and other languages used inside and outside EDA tools.
- Strong knowledge of layout rules, device identification, foundry rules, design for manufacturing, quality, reliability, and yield.
Nice to have
- Master’s degree in Electrical Engineering or a related field.
- Knowledge of extraction, reliability, and dynamic noise.
- Experience with Calibre, Pegasus, Hercules, or similar layout verification syntax and semantics.
Culture & Benefits
- Full-time position within a large global semiconductor organization.
- Support for employee development and career growth through leadership programs.
- Collaborative environment focused on innovation, trust, empowerment, respect, diversity, and communication.
- Travel requirement of 0%–25%.
- Work is performed indoors, primarily seated, with regular interaction with others.
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