7 дней назад
Junior Physical Design Engineer - MCU
31 200 - 43 000€
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Junior Physical Design Engineer - MCU (RTL-to-GDSII/MCU): Supporting physical implementation of complex SoC and MCU designs, from floorplanning and power-grid design through place-and-route, clock-tree synthesis, and physical verification, with an accent on performance, power, and area targets. Focus on timing analysis, IR-drop and electromigration analysis, design-team handoffs, and automation scripting with TCL, Python, and Perl.
Location: Catania, Italy
Salary: €31,200–€43,000 gross annual base salary
Company
develops industrial and IoT edge-processing solutions, including microcontrollers and high-performance processors for autonomous homes, industrial automation, and personal electronics.
What you will do
- Support the RTL-to-GDSII physical implementation flow for complex SoC and MCU designs on advanced nodes.
- Assist with floorplanning, power-grid design, I/O placement, place-and-route, clock-tree synthesis, and physical verification.
- Perform tool setup, static timing analysis, timing-constraint management, IR-drop analysis, and electromigration analysis.
- Collaborate with RTL, DFT, and analog design teams on design handoffs and integration.
- Maintain and extend TCL, Python, and Perl automation scripts to improve flow efficiency and design analysis.
- Apply EDA tools and work with vendors to troubleshoot implementation issues.
Requirements
- Bachelor’s or master’s degree in electrical engineering, electronics engineering, or a related field.
- Understanding of digital design principles, semiconductor physics, integrated-circuit fundamentals, and the IC design flow from RTL to GDSII.
- Knowledge of setup and hold timing, clock distribution, and low-power fundamentals such as clock gating.
- Basic scripting knowledge in TCL, Python, and/or Perl.
- Excellent written and verbal English communication skills are required.
- Analytical, structured, detail-oriented, collaborative, and eager to learn microelectronics and hardware development.
Nice to have
- Internship, thesis, or hands-on project experience in physical design, implementation, or VLSI design.
- Familiarity with Synopsys Fusion Compiler, ICC2, Formality, or Cadence Innovus and Genus.
- Exposure to Ansys RedHawk or Cadence Voltus for IR-drop analysis.
- Knowledge of UPF/CPF low-power techniques or full-custom layout fundamentals.
- Exposure to AI/ML applications in EDA or microcontrollers.
Culture & Benefits
- Opportunity to join a new Catania engineering team working across analog and SoC digital design.
- Collaboration with experienced engineers and international teams.
- Work on high-impact MCU products for intelligent AI at the Edge.
- Compensation follows the applicable Italian Metalworking Industry National Collective Labour Agreement.
- Additional compensation may include annual incentives, equity, and benefits.
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