Назад
Company hidden
7 дней назад

Principal Physical Design Engineer - MCU (Semiconductors)

61 000 - 83 900
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Italy
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Principal Physical Design Engineer - MCU (Semiconductors): Developing and implementing complex, high-performance semiconductor integrated circuits for microcontrollers with an accent on timing closure, floorplanning, place and route, power integrity, and physical verification. Focus on defining physical design methodologies, solving advanced-node timing and power challenges, ensuring tape-out readiness, and mentoring physical design engineers.

Location: Catania, Italy

Salary: €61,000–€83,900 gross annual base salary

Company

hirify.global develops industrial and IoT edge-processing solutions, including microcontrollers and high-performance processors for autonomous homes, industrial automation, and personal electronics.

What you will do

  • Lead physical design and implementation for complex, high-performance MCU integrated circuits.
  • Perform floorplanning, power grid design, place and route, low-power implementation, clock tree synthesis, and timing closure.
  • Analyze power integrity, signal integrity, static timing, and physical verification results, including DRC, LVS, and antenna checks.
  • Define and implement physical design methodologies, flows, and best practices to optimize performance, power, and area.
  • Collaborate with architecture, RTL, DFT, and package teams to deliver tape-out-ready products.
  • Mentor physical design engineers and evaluate new EDA tools and technologies.

Requirements

  • Bachelor’s degree with 12+ years of professional experience or a master’s degree with 10+ years of professional experience.
  • Extensive experience in back-end implementation, synthesis, low-power design, power analysis, equivalence checking, and STA.
  • Expertise with physical design and verification tools such as Cadence Innovus, Synopsys Fusion Compiler or ICC2, Ansys RedHawk or PowerSI, PrimeTime, IC Validator, Pegasus, PVS, and Calibre.
  • Strong knowledge of advanced technology nodes, preferably 16nm and below, semiconductor device physics, process effects, DFM, and DFY.
  • Experience with UPF/CPF, clock gating, power intent, timing constraints, and sign-off criteria.
  • Proficiency in Tcl, Python, or Perl, with strong analytical, debugging, communication, collaboration, and mentoring skills.

Culture & Benefits

  • Opportunity to work on intelligent AI-at-the-edge microcontrollers and high-impact semiconductor products.
  • Cross-functional collaboration across analog, SoC digital design, architecture, RTL, DFT, and packaging.
  • Competitive benefits package with potential annual incentives and equity.
  • Compensation governed by the applicable National Collective Labour Agreement (Metalmeccanica Industria).
  • Commitment to equal pay for equal work and transparent remuneration practices.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →